An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count

被引：0
|
作者：
Arif, M Saad Bin [1 ,4 ]
Mustafa, Uvais [1 ]
Siddique, Marif Daula [2 ]
Ahmad, Shahbaz [1 ]
Iqbal, Atif [2 ]
Ashique, Ratil Hasnat [3 ]
Ayob, Shahrin bin [4 ]
机构：
[1] Department of Electrical Engineering, Z. H. College of Engineering and Technology, AMU, Aligarh, India
[2] Department of Electrical Engineering, Qatar University, Doha, Qatar
[3] Department of Electrical Electronics Engineering, Green University Bangladesh, Dhaka, Bangladesh
[4] Power Engineering Department, School of Electrical Engineering, UTM, Johor, Malaysia
来源：
IET Power Electronics | 2022年 / 14卷 / 12期
关键词：
Balancing - Bridge circuits - Electric inverters;
D O I：
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中图分类号：
学科分类号：
摘要：
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页码：2052 / 2066
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