On modeling and testing of lithography related open faults in nano-CMOS circuits

被引：0
|
作者：
Sreedhar, Aswin [1 ]
Sanyal, Alodeep [1 ]
Kundu, Sandip [1 ]
机构：
[1] University of Massachusetts, Amherst, United States
来源：
Proceedings -Design, Automation and Test in Europe, DATE | 2008年
关键词：
D O I：
Design, Automation and Test in Europe, DATE 2008
中图分类号：
学科分类号：
摘要：
Lithography
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收藏
页码：616 / 621
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