共 50 条
- [1] A Cost and Performance Analytical Model for Large-scale On-chip Interconnection Networks 2016 FOURTH INTERNATIONAL SYMPOSIUM ON COMPUTING AND NETWORKING (CANDAR), 2016, : 447 - 450
- [3] A comprehensive analytical model of interconnection networks in large-scale cluster systems CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2008, 20 (01): : 75 - 97
- [5] On-chip and inter-chip networks for modelling large-scale neural systems 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 1945 - 1948
- [6] Impact of On-Chip Interconnection in a Large-Scale Memristor Crossbar Array for Neural Network Accelerator and Neuromorphic Chip 2019 IEEE 28TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS 2019), 2019,
- [8] Benchmarking of on-chip interconnection networks 16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2004, : 621 - 624
- [9] Performance prediction using simulation of large-scale interconnection networks in POSE WORKSHOP ON PRINCIPLES OF ADVANCED AND DISTRIBUTED SIMULATION, PROCEEDINGS, 2005, : 109 - 118
- [10] Evaluation and performance comparison of TriBA with existing on-chip interconnection networks THIRD INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES 2007, PROCEEDINGS, 2007, : 291 - +