A wide dynamic range CMOS image sensor with improved 12-bit column parallel cyclic ADCs

被引：0

作者：

Park, Jong-Ho ^{[1
]}

Kawahito, Shoji ^{[2
]}

Furuta, Masanori ^{[2
]}

Sasaki, Masaaki ^{[3
]}

Wakamori, Yasuo ^{[4
]}

Mase, Mitsuhito ^{[5
]}

Ohta, Yukihiro ^{[6
]}

机构：

[1] Graduate School of Electronic Science and Technology, Shizuoka University, Hamamatsu, 432-8011

[2] Research Institute of Electronics, Shizuoka University, Hamamatsu, 432-8011

[3] Sendai National College of Technology

[4] LSI Development Department, Semiconductor Division, Yamaha Corp., Iwata

[5] Graduate School of Science and Engineering, Shizuoka University, Hamamatsu, 432-8011

[6] Hamamatsu Industrial Research Institute of Shiauoka Prefecture, Hamamatsu 431-2103

来源：

Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers | 2007年 / 61卷 / 03期

关键词：

CMOS image sensor; Column parallel ADC; Multiple exposure; Wide dynamic range;

D O I：

10.3169/itej.61.360

中图分类号：

学科分类号：

摘要：

We present very wide dynamic range (WDR) CMOS image sensor that integrates improved high-speed column-parallel cyclic ADCs. The proposed signal readout technique of extremely short accumulation (ESA) enables the dynamic range to be expanded to a very high illumination region. Including the ESA signals, a total of four different accumulation time signals are read out in one frame period using a burst readout technique. To achieve the high-speed and high-quality signal readout required for multiple exposure signals, column parallel high-speed A/D converters are integrated at the upper and lower sides of the pixel arrays. This improved cyclic ADC, with reduced random noise, better linearity and offset deviation, expands the dynamic range in the low illumination region. The resulting dynamic range is maximally 153 dB. The improved 12-bit cyclic ADC has a differential non-linearity (DNL) of ±0.3 LSB.

引用

页码：360 / 368

页数：8

共 12 条

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