Examination of the impingement of interface trap charges on heterogeneous gate dielectric dual material control gate tunnel field effect transistor for the refinement of device reliability

被引:0
|
作者
Gupta S. [1 ]
Sharma D. [1 ]
Soni D. [1 ]
Yadav S. [1 ]
Aslam M. [1 ]
Yadav D.S. [1 ]
Nigam K. [1 ]
Sharma N. [2 ]
机构
[1] Nanoelectronics and VLSI Lab, Electronics and Communication Engineering Discipline, PDPM Indian Institute of Information Technology, Design and Manufacturing, Jabalpur
[2] Department of Computer Engineering, Ramrao Adik Institute of Technology, Nerul, Navi, Mumbai
来源
Micro and Nano Letters | 2018年 / 13卷 / 08期
关键词
D O I
10.1049/MNL.2017.0869
中图分类号
学科分类号
摘要
In this work, the authors have reported the reliability issues of dual material control gate tunnel field effect transistor (DMCG-TFET) and proposed heterogeneous gate dielectric dual metal control gate tunnel field effect transistors (HD DMCG-TFETs) in terms of interface trap charges (ITCs). The positive and negative types of localised charges at the semiconductor/insulator interface cause degradation in the device performance (DC/RF). In this regard, the proposed structure which includes combination of low-K and high-K dielectric improves the immunity towards the ITCs at the interface of semiconductor/insulator with better performance. In this concern, the study has analysed the impact of ITCs on DC and analogue/RF performances of the DMCG-TFET and HD DMCG-TFET in terms of various parameters like electric field, energy band diagram, carrier concentration, transfer characteristics, transconductance (gm ), cutoff frequency (fT ) and gain bandwidth product. Further to this, impact on device linearity parameters is also analysed through higher order of transconductance coefficients (gm3 ), VIP2, VIP3 and IIP3. © The Institution of Engineering and Technology 2018.
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页码:1192 / 1196
页数:4
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