Silicon nanowire arrays (Si NWs) have been extensively used in nanoscale thermoelectric and biosensors, optoelectronic devices, solar cells, lithium-ion battery and other fields, thanks to its unique structure, high thermal conductivity, photoelectric properties and electrochemical performance. The metal-assisted chemical etching (MACE) provides a simple, convenient, low-cost and high efficient approach to fabricate Si NWs, which is most likely to achieve large-scale commercial application and has aroused considerable attention in the past decades. The processes of preparing silicon nanowires by metal-assisted chemical etching can be separated into two steps. First, a layer of metal (Ag, Au, Pt, et al. ) nanoparticles is deposited on the surface of clean silicon wafer to oxidize the nearby silicon atoms. Then dissolve the oxide layer by HF and etch the silicon wafer to form an array of Si NWs. Nevertheless, this simple and efficient approach for preparing Si NWs presents several uncontrollable defects. Firstly, the deposited metal nanoparticles on silicon wafer surface would gradually grow larger and agglomerate together, resulting in low density of Si NWs. Secondly, nonuniformity distribution of metal nanoparticles on silicon wafer not only leads to relatively wide diameter range (50-200 nm) of the fabricated nanowires, but also causes the disorder of nanowire arrays and the difficulty to control their spacing. Thirdly, it is commonly observed that long nanowire clusters at tips, due to van der Waals. In view of the problems in conventional approaches and the requirements of diverse devices for the morphology, types and diameters of the silicon nanowires, therefore, recent studies have focused on reducing of clusters at the top of nanowires, regulating the surface roughness and diameter of nanowires, and preparing ordered silicon nanowires at low cost. Notable progress has been achieved in optimizing the conventional MACE methods, which can be concluded as follow. Ⅰ. Pre-surface treatment of silicon wafer using acid solution or UV/Ozone will improve the uniformity of nanowire arrays as well as increase the density (from 18% to 38%). Ⅱ. Depositing a layer of metal nano-film on the surface of silicon wafer by physical vapor deposition, followed by etching, can effectively reduce the clusters and improve the uniformity of nanowire diameter. Ⅲ. Template methods (polystyrene spheres templates, porous anodic alumina templates, silica templates, and photoresist templates, etc. ) can realize the fabrication of ordered nanowire arrays. The controllable diameter of polystyrene nanoparticles, ranging from 30 nm to 90 nm, were successfully prepared by ion beam etching technology in our research group, which pave an effective way for preparing ordered Si NWs with small size (less than 100 nm). In this article, the basic synthetic processes and fundamental etching mechanism of MACE are briefly introduced. Specifically, the impact of type of silicon substrate, the concentration of etching solution, temperature and etching time on the morphology, surface roughness, etching direction and etching rate of Si NWs are discussed. The mechanism of etching path deviation from the vertical direction under excessive amount of H2O2 and the reason for the variation of etching rate with the solution concentration are explained by the relevant theories. Emphasis is put on the research progress of reducing the cluster at the top of nanowires, improving uniformity, preparing ordered nanowires with controllable diameters and spacing by approaches including pretreatment of silicon wafer using oxidation layer, deposition of metal nanofilms using physical method, the treatment of annealing and template method. © 2019, Materials Review Magazine. All right reserved.
