A Strategy for Neutral Voltage Modulation Ensuring Fault Tolerance in CHB Multilevel Inverters With Reduced CMV and Unbalanced DC Sources

被引:2
作者
Sornsadaeng, Thawat [1 ]
Chanhom, Peerapon [2 ]
Amorndechaphon, Damrong [3 ]
Sirisukprasert, Siriroj [1 ]
机构
[1] Kasetsart Univ, Fac Engn, Dept Elect Engn, Bangkok 10900, Thailand
[2] Rajamangkala Univ Technol Suvarnabhumi, Fac Ind Educ, Dept Elect Engn, Nonthaburi 11000, Thailand
[3] Univ Phayao, Automot & Transportat Technol Dev Ctr ATDC, Sch Engn, Phayao 56000, Thailand
关键词
Space vector pulse width modulation; Voltage control; Vectors; Multilevel inverters; Fault tolerance; Phase modulation; Total harmonic distortion; Symbols; Cascaded H-bridge multilevel inverters; common-mode voltage; fault tolerant; neutral voltage modulation; space vector pulse width modulation; unbalanced DC source voltage control; COMMON-MODE VOLTAGE; SPACE VECTOR MODULATION; REDUCTION; PWM;
D O I
10.1109/ACCESS.2024.3484587
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper introduces a fault-tolerant control method for Cascaded H-Bridge Multilevel Inverters (CHB MLI) using Neutral Voltage Modulation (NVM), enabling reliable operation even when DC source modules are damaged or operating at reduced voltage. The method calculates the inverter's modulating signals based on the lowest and middle DC source voltages of each phase, followed by the calculation and injection of a common-mode voltage (CMV) modulating signal, which is minimized or nullified. This approach effectively reduces CMV and prevents overmodulation by regulating the control signal to remain within the available module voltage, ensuring balanced three-phase output with low Total Harmonic Distortion (THD). Moreover, the method adapts to unbalanced DC source conditions by dynamically adjusting the inverter's modulating signals in response to voltage changes, offering a more comprehensive solution compared to traditional NVM techniques. The proposed method is validated through simulations and experiments with an asymmetrical three-phase CHB MLI using Resistive-Inductive (RL) loads. Results confirm its robustness and efficiency across various fault scenarios and operating conditions, demonstrating its potential to significantly enhance system reliability, stability, and performance in industrial applications.
引用
收藏
页码:154138 / 154159
页数:22
相关论文
共 46 条
[31]   Common-Mode Voltage Reduction Method for Three-Level Inverter With Unbalanced Neutral-Point Voltage Conditions [J].
Qin, Changwei ;
Li, Xiaoyan ;
Xing, Xiangyang ;
Zhang, Chenghui ;
Zhang, Guangxian .
IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, 2021, 17 (10) :6603-6613
[32]   Reduction of Common-Mode Voltages for Five-Level Active NPC Inverters by the Space-Vector Modulation Technique [J].
Quoc Anh Le ;
Lee, Dong-Choon .
IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2017, 53 (02) :1289-1299
[33]  
Raki Ashkan, 2022, 2022 30th International Conference on Electrical Engineering (ICEE), P909, DOI 10.1109/ICEE55646.2022.9827146
[34]   A Fault-Tolerant Strategy for Safe Operation of Cascaded H-Bridge Multilevel Inverter Under Faulty Condition [J].
Raki, Ashkan ;
Neyshabouri, Yousef ;
Aslanian, Mahdi ;
Iman-Eini, Hossein .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2023, 38 (06) :7285-7295
[35]   Fault-Tolerant Operation of Three-Phase Cascaded H-Bridge Converters Using an Auxiliary Module [J].
Salimian, Houshang ;
Iman-Eini, Hossein .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2017, 64 (02) :1018-1027
[36]  
Sornsadaeng T., 2022, P 19 INT C EL ENG EL, P1, DOI [10.1109/ECTI-CON54298.2022. 9795474, DOI 10.1109/ECTI-CON54298.2022.9795474]
[37]  
Swamy D. Manikanta, 2019, 2019 2nd International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT), P305, DOI 10.1109/ICICICT46008.2019.8993140
[38]   SVPWM Strategy Based on the 45° Coordinates to Suppress Common-Mode Voltage for Multilevel Converters [J].
Wang, Cui ;
Zeng, Wenjun ;
Wang, Yunhe ;
Li, Changxue ;
Duan, Wanzheng ;
Yang, Xiaopin ;
Xie, Yunmin .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2023, 38 (02) :1984-1997
[39]   A Generalized Selective Harmonic Elimination PWM Formulation With Common-Mode Voltage Reduction Ability for Multilevel Converters [J].
Wu, Mingzhe ;
Xue, Cheng ;
Li, Yun Wei ;
Yang, Kehu .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2021, 36 (09) :10753-10765
[40]   A Hybrid PWM Strategy for Three-Level Inverter With Unbalanced DC Links [J].
Wu, Xiang ;
Tan, Guojun ;
Yao, Guangyao ;
Sun, Chuanda ;
Liu, Guanghui .
IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2018, 6 (01) :1-15