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Threshold Implementations in Software: Micro-architectural Leakages in Algorithms
被引:0
|
作者
:
Gaspoz J.
论文数:
0
引用数:
0
h-index:
0
机构:
Imec-COSIC, ESAT, KU, Leuven
Imec-COSIC, ESAT, KU, Leuven
Gaspoz J.
[
1
]
Dhooghe S.
论文数:
0
引用数:
0
h-index:
0
机构:
Imec-COSIC, ESAT, KU, Leuven
Imec-COSIC, ESAT, KU, Leuven
Dhooghe S.
[
1
]
机构
:
[1]
Imec-COSIC, ESAT, KU, Leuven
来源
:
IACR Transactions on Cryptographic Hardware and Embedded Systems
|
2023年
/ 2023卷
/ 02期
关键词
:
Masking;
Micro-architectures;
Probing Security;
Side-channel Analysis;
D O I
:
10.46586/tches.v2023.i2.155-179
中图分类号
:
学科分类号
:
摘要
:
This paper provides necessary properties to algorithmically secure first-order maskings in scalar micro-architectures. The security notions of threshold implementations are adapted following micro-processor leakage effects which are known to the literature. The resulting notions, which are based on the placement of shares, are applied to a two-share randomness-free PRESENT cipher and Keccak-f. The assembly implementations are put on a RISC-V and an ARM Cortex-M4 core. All designs are validated in the glitch and transition extended probing model and their implementations via practical lab analysis. © 2023, Ruhr-University of Bochum. All rights reserved.
引用
收藏
页码:155 / 179
页数:24
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IACR Transactions on Cryptographic Hardware and Embedded Systems,
2024,
2024
(03):
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376
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