An Improved Multi-objective Particle Swarm Optimization Algorithm for Polarity Optimization of FPRM Circuits

被引:4
作者
Fu Q. [1 ,2 ]
Wang P. [1 ]
Wang M. [1 ]
Tong N. [2 ]
Zhang H. [1 ]
机构
[1] Institute of Circuits and Systems, Ningbo University, Ningbo
[2] College of Science and Technology, Ningbo University, Ningbo
来源
Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics | 2018年 / 30卷 / 03期
关键词
Delay-area- power trade-off; FPRM circuits; Multi-objective particle swarm optimization; Pareto; Polarity search;
D O I
10.3724/SP.J.1089.2018.16297
中图分类号
学科分类号
摘要
To optimize the multi-objective polarity design of large-scale FPRM circuits, a solution based on improved multi-objective particle swarm optimization (IMOPSO) algorithm is proposed. Firstly, the multi-objective decision model is established according to the delay, area and power of large-scale MPRM circuits. Then, based on the principle of the exploration and exploitation, the particles, representing the circuits’ polarities, achieve evolution by means of repository and gain quality evaluation from Pareto analysis, to obtain the Pareto optimal set for delay-area-power trade-off. Finally, the proposed solution is compared with the three currently preferred algorithms on MCNC Benchmark with PLA format, and the results verify the effectiveness of the solution. © 2018, Beijing China Science Journal Publishing Co. Ltd. All right reserved.
引用
收藏
页码:540 / 548
页数:8
相关论文
共 18 条
[1]  
Monreiro C., Takahashi Y., Sekine T., Low-power secure S-box circuit using charge-sharing symmetric adiabatic logic for advanced encryption standard hardware design, IET Circuits, Devices & Systems, 9, 5, pp. 362-369, (2015)
[2]  
Al Jassani B.A., Urquhart N., Almaini A.E.A., Manipulation and optimization techniques for Boolean logic, IET Computers & Digital Techniques, 4, 3, pp. 227-239, (2010)
[3]  
Bu D., Jiang J., Dual logic based polarity conversion and optimization of mixed polarity RM circuits, Acta Electronica Sinica, 43, 1, pp. 79-85, (2015)
[4]  
Wang P., Wang Z., Chen Y., Et al., Searching the best polarity for fixed polarity Reed-Muller circuits based on delay model, Journal of Zhejiang University: Engineering Science, 47, 2, pp. 361-366, (2013)
[5]  
Bu D., Fast heuristic area optimization algorithm for ESOP circuits, Journal of Computer-Aided Design & Computer Graphics, 27, 11, pp. 2161-2168, (2015)
[6]  
He Z.X., Xiao L.M., Gu F.E.I., Et al., An efficient and fast polarity optimization approach for mixed polarity Reed-Muller logic circuits, Frontiers of Computer Science, 11, 4, pp. 1-15, (2017)
[7]  
Wang L., Xia Y., Chen X., Two-level MPRM functions optimization based on majority cubes, Journal of Electronics & Information Technology, 34, 4, pp. 986-991, (2012)
[8]  
Das A., Pradhan S.N., Thermal aware FPRM based AND-XOR network synthesis of logic circuits, Proceedings of the 2nd IEEE International Conference on Recent Trends in Information System(ReTIS), pp. 497-502, (2015)
[9]  
Wang P.J., Li K.P., Zhang H.H., PMGA and its application in area and power optimization for ternary FPRM circuit, Journal of Semiconductors, 37, 1, pp. 126-130, (2016)
[10]  
Jing S., Jiang H., Xu W., Et al., Cloud manufac-turing service composition considering execution reliability, Journal of Computer-Aided Design & Computer Graphics, 26, 3, pp. 392-400, (2014)