Influencing Factors and Suppression Methods for Current Unbalance of Parallel Silicon Carbide MOSFETs: A Review

被引：0

作者：

Zhao, Zhibin ^{[1
]}

Qiao, Jianshen ^{[1
]}

Sun, Peng ^{[1
]}

Cai, Yumeng ^{[1
]}

Zhao, Bin ^{[2
]}

Wei, Hong ^{[3
,4
]}

机构：

[1] State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources, North China Electric Power University, Beijing,102206, China

[2] State Grid Beijing Electric Power Research Institute, Beijing,100075, China

[3] NARI Group Corporation, State Grid Electric Power Research Institute, Co., Ltd., Nanjing,211000, China

[4] China EPRI Science & Technology Co., Ltd., Beijing,102200, China

来源：

Gaodianya Jishu/High Voltage Engineering | 2024年 / 50卷 / 02期

关键词：

Electric power distribution - MOSFET devices;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

Silicon carbide MOSFETs have gradually been used in industry due to their excellent properties such as high voltage class, high temperature, and high frequency. However, the current unbalance of parallel SiC MOSFETs limits the performance of SiC MOSFETs and increases the risk of failure. In order to give full play to the performance advantages of SiC MOSFET, this paper expounds the influencing factors of current unbalance from three aspects, namely, chip parameters, power loop parameters, and drive loop parameters, and summarizes the research results of suppressing parallel current unbalance at home and abroad. The current unbalance suppression method is comprehensively compared and analyzed from four dimensions as follows: current balance types, expansion, integration, and cost. Finally, according to the existing deficiencies and challenges, this paper put forward the prospects in the current unbalance suppression method of SiC MOSFET. © 2024 Science Press. All rights reserved.

引用

页码：634 / 648