Development of complete image processing system including image filtering, image compression & image security

被引:4
作者
Shelke S.K. [1 ]
Sinha S.K. [1 ]
Patel G.S. [2 ]
机构
[1] School of Electronics & Electrical Engineering, Lovely Professional University, Punjab, Phagwara
[2] IIMT College of Engineering, Greater Noida, UP
关键词
Adaptive Median Filter; AES; Image Compression; Image Encryption; Image Filtering;
D O I
10.1016/j.matpr.2021.06.154
中图分类号
学科分类号
摘要
Computer vision is nowadays is one of the promising & evolving areas in information technology. Image processing is increasingly used in several applications such as automotive, medical or aerospace. Every computer vision application involves capturing several images with the help of camera. Image acquisition, image transmission & image security are the three important aspects of image processing system. This paper includes development of complete image processing system including improved median filtering with better PSNR & operating frequency, Image compression module with better PSNR & compression ratio, Image Encryption module using Advanced Encryption Standard. © 2021
引用
收藏
页码:2167 / 2171
页数:4
相关论文
共 13 条
[1]  
Tan X., Liu Y., Zuo C., Zhang M., A real-time video denoising algorithm with FPGA implementation for Poisson-Gaussian noise, J. Real-Time Image Proc., 13, 2, pp. 327-343, (2017)
[2]  
Jelodari P.T., Kordasiabi M.P., Sheikhaei S., Forouzandeh B., FPGA implementation of an adaptive window size image impulse noise suppression system, J. Real-Time Image Proc., 16, 6, pp. 2015-2026, (2019)
[3]  
Dabhade S.D., Rathna G.N., Chaudhury K.N., A reconfigurable and scalable FPGA architecture for bilateral filtering, IEEE Trans. Ind. Electron., 65, 2, pp. 1459-1469, (2017)
[4]  
Pal C., Kotal A., Samanta A., Chakrabarti A., Ghosh R., An efficient FPGA implementation of optimized anisotropic diffusion filtering of images, Int. J. Reconfig. Comput., (2016)
[5]  
Jridi M., Alfalou A., Kumar Meher P., Optimized architecture using a novel subexpression elimination on Loeffler algorithm for DCT-based image compression, VLSI Design, (2012)
[6]  
Kim H., No A., Lee H.J., SPIHT algorithm with adaptive selection of compression ratio depending on DWT Coefficients, IEEE Trans. Multimedia, 20, 12, pp. 3200-3211, (2018)
[7]  
Huang Z., Zhang X., Chen L., Zhu Y., An F., Wang H., Feng S., A vector-quantization compression circuit with on-chip learning ability for high-speed image sensor, IEEE Access, 5, pp. 22132-22143, (2017)
[8]  
Saad A.H., Abdullah M.Z., High-speed implementation of fractal image compression in low cost FPGA, Microprocess. Microsyst., 47, pp. 429-440, (2016)
[9]  
Shelke S.K., Patel G.S., Low power high frequency implementation of image filtering using improved median filtering, Int. J. Adv. Sci. Technol., 29, 4s, pp. 1833-1843, (2020)
[10]  
Shelke S.K., Patel G.S., Verma B., Analysis of complete image processing system and design of improved compression system, Think India, 22, 16, pp. 1161-1169, (2019)