共 10 条
[1]
Lin C.W., Ghosh S., A family of schmitt-trigger-based arbiter-PUFs and selective challenge-pruning for robustness and quality, IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 32-37, (2015)
[2]
Rahman M.T., Rahman F., Forte D., Et al., ARO-PUF: An aging-resistant RO-PUF for reliable key generation, IEEE Transactions on Emerging Topics in Computing, 4, 3, pp. 335-348, (2016)
[3]
Zhang J.R., Zhao Y.F., Study on temperature effects based on measuring power distribution system of PUF, 2013 IEEE International Conference on Anti-Counterfeiting, Security and Identification (ASID), pp. 1-3, (2013)
[4]
Kumar R., Burleson W., On design of a highly secure PUF based on non-linear current mirrors, 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp. 38-43, (2014)
[5]
Xu X.L., Rahmati A., Holcomb D.E., Et al., Reliable physical unclonable functions using data retention voltage of SRAM cells, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 34, 6, pp. 903-914, (2015)
[6]
Bhargava M., Cakir C., Mai K., Attack resistant sense amplifier based PUFs (SA-PUF) with deterministic and controllable reliability of PUF responses, IEEE International Symposium on Hardware-Oriented Security and Trust, pp. 106-111, (2010)
[7]
Paral Z., Devadas S., Reliable and efficient PUF-based key generation using pattern matching, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), pp. 128-133, (2011)
[8]
Vivekraja V., Nazhandali L., Feedback based supply voltage control for temperature variation tolerant PUFs, 24th International Conference on VLSI Design, pp. 214-219, (2011)
[9]
Liu C.Q., Cao Y., Et al., ACRO-PUF: A low-power, reliable and aging-resilient current starved inverter-based ring oscillator physical unclonable function, IEEE Transactions on Circuits and Systems I: Regular Papers, 64, 12, pp. 3138-3149, (2017)
[10]
Taneja S., Alvarez A., Et al., A fully-synthesizable C-element based PUF featuring temperature variation compensation with native 2.8% BER, 1.02fJ/b at 0.8-1.0V in 40nm, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 301-304, (2017)