Design of GNSS DPLL with large closed-loop delay

被引:0
|
作者
Tang X. [1 ,2 ]
Zhu X. [1 ,2 ]
Teng X. [3 ]
Zhang M. [3 ]
Shen J. [3 ]
机构
[1] School of Instrument Science and Engineering, Southeast University, Nanjing
[2] Key Laboratory of Micro-inertial Instrument and Advanced Navigation Technology, Ministry of Education, Nanjing
[3] State Key Laboratory of Smart Grid Protection and Control, Nari Group Corporation, Nanjing
关键词
BT constraint; controlled-root method; GNSS tracking loops; vector tracking;
D O I
10.13695/j.cnki.12-1222/o3.2023.08.007
中图分类号
TN911 [通信理论];
学科分类号
081002 ;
摘要
In the design of GNSS terminal scheme, the large closed-loop delay of tracking loop will lead to the deviation between the traditional digital tracking loop model and the actual model, which greatly restricts the constraint limit of the normalized noise bandwidth, thus affecting the dynamic performance and tracking accuracy of the loop. In order to tackle the issue, the influence of noise bandwidth and coherence integration period on the pole position of the discrete model in Z domain of tracking loop is further analyzed, and a controlled-root method is leveraged to conduct the derivation of the digital loop filter, which achieves stable operation of the digital phase-locked loop (DPLL) under high delay conditions. The experimental results show that compared with the traditional tracking loop, when the closed-loop delay is 100 ms, the normalized noise bandwidth of the proposed DPLL can be extended from 0.08 to 1.321, which is of great significance for the tracking of high-dynamic and weak GNSS signals and the subsequent navigation solution. © 2023 Editorial Department of Journal of Chinese Inertial Technology. All rights reserved.
引用
收藏
页码:790 / 796and805
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