A simplified multilevel space vector pulse-width modulation algorithm for single-phase converter

被引:0
|
作者
Xiong C.-L. [1 ]
Diao F. [1 ,2 ]
Wu X.-J. [1 ,2 ]
Feng X.-Y. [1 ]
机构
[1] School of Electrical Engineering, Southwest Jiaotong University, Chengdu
[2] Key Laboratory of Magnetic Suspension Technology and Maglev Vehicle, Ministry of Education, Southwest Jiaotong University, Chengdu
关键词
Algorithm simplification; Field programmable gate array; Reference voltage vector decomposition; Single-phase multilevel converter; Space vector pulse width modulation;
D O I
10.15938/j.emc.2019.04.007
中图分类号
学科分类号
摘要
To solve the implementation complexity problem of single-phase 5-L/7-L converter space vector pulse-width modulation (SVPWM) algorithm, a simplified space vector pulse-width modulation algorithm is proposed. The proposed algorithm simplified the calculation of single-phase 5-L/7-L SVPWM to single-phase 3-L SVPWM by dividing the voltage vector space of single-phase 5-L/7-L SVPWM into different single-phase 3-L SVPWM voltage vector space and decomposing the reference voltage vector into different voltage vectors. The computational complexity and resource consumption of micro controller chip based on the proposed algorithm is less than the conventional algorithm, and the capacitor voltage balancing scheme can be implemented easily. The proposed single-phase 5-L/7-L SVPWM and conventional single-phase 5-L/7-L SVPWM for cascaded H-bridge (CHB) converter and neutral point clamped (NPC) converter were realized on a single field programmable gate array (FPGA) to verify correctness and effectiveness of the proposed algorithm. © 2019, Harbin University of Science and Technology Publication. All right reserved.
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页码:56 / 66
页数:10
相关论文
共 22 条
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