Review on the memristor based neuromorphic chips

被引：0

作者：

Chen C. ^{[1
]}

Luo C. ^{[1
]}

Liu S. ^{[1
]}

Liu H. ^{[1
]}

机构：

[1] College of Electronic Science and Technology, National University of Defense Technology, Changsha

来源：

Guofang Keji Daxue Xuebao/Journal of National University of Defense Technology | 2023年 / 45卷 / 01期

关键词：

acceleration chip; low power consumption; memristor; neuromorphic computing; processing-in-memory;

D O I：

10.11887/j.cn.202301001

中图分类号：

学科分类号：

摘要：

In order to master the current development status and development trends of memristor based neuromorphic chips, the existing memristor based neuromorphic chips and architectures were investigated. The memristor array structure and integration process, anterior and posterior neuron circuits, multi-array interconnection topology and data transmission strategy used in the chip, as well as the system simulation and evaluation methods used in the chip design process were compared and analyzed. It is concluded that the current circuit design of memristor based neuromorphic chips still need to solve the problems of limited resistance states, large device parameter fluctuation, complex array peripheral circuits, small integration scale, etc. It is pointed out that the actual application of this type of chip still faces challenges such as the improvement of memristor production process, improvement of development tool support, special instruction set development, and determination of typical traction applications. © 2023 National University of Defense Technology. All rights reserved.

引用

页码：1 / 14

页数：13

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