On automating delayered IC analysis for hardware IP protection

被引：0
|
作者：
Sarkar, Esha [1 ]
Maniatakos, Michail [2 ]
机构：
[1] Electrical and Computer Engineering Tandon School of Engineering, New York University, United States
[2] Center for Cyber Security, New York University Abu Dhabi, United States
来源：
ACM International Conference Proceeding Series | 2019年 / Part F148162卷
关键词：
Automated IC analysis - Automated test pattern generations - Automated tools - Hardware ip protections - Integrated circuits (ICs) - Malicious circuits - Physical inspection - Production cost;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
35
引用
收藏
页码：205 / 210
相关论文
共 50 条
  • [31] Hardware IP protection by exploiting IP vendor’s proteogenomic BioMarker as digital watermark during behavioral synthesis
    Anirban Sengupta
    Nabendu Bhui
    Vishal Chourasia
    Scientific Reports, 15 (1)
  • [32] Analysis of an ESD Suppressor Used for IC Protection
    Kuo, Cheng-Ta
    Chen, Hsing-Yi
    Suo, Ying
    Qiu, Jinghui
    2010 IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM, 2010,
  • [33] From Full-Custom to Gate-Array ASIC for Hardware IP Protection
    Kamali, Hadi Mardani
    17TH IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE, DCAS 2024, 2024,
  • [34] SEM-based Nanoprobing on In-Situ Delayered Advanced 10 nm Technology Node IC
    Sikula, Marek
    Novotny, Karel
    Kemmler, Matthias
    Rummel, Andreas
    2018 25TH IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2018,
  • [35] Patch-Based Adversarial Training for Error-Aware Circuit Annotation of Delayered IC Images
    Tee, Yee-Yang
    Hong, Xuenong
    Cheng, Deruo
    Chee, Chye-Soon
    Shi, Yiqiong
    Lin, Tong
    Gwee, Bah-Hwee
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2023, 70 (09) : 3694 - 3698
  • [36] Invited: Automating Hardware Security Property Generation
    Kastner, Ryan
    Restuccia, Francesco
    Meza, Andres
    Ray, Sayak
    Fung, Jason
    Sturton, Cynthia
    PROCEEDINGS OF THE 59TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC 2022, 2022, : 1384 - 1387
  • [37] AUTOMATING MOST PARTS OF HARDWARE PROOFS IN HOL
    SCHNEIDER, K
    KUMAR, R
    KROPF, T
    LECTURE NOTES IN COMPUTER SCIENCE, 1992, 575 : 365 - 375
  • [38] Hacking and Protecting IC Hardware
    Hamdioui, Said
    Di Natale, Giorgio
    van Battum, Gerard
    Danger, Jean-Luc
    Smailbegovic, Fethulah
    Tehranipoor, Mark
    2014 DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION (DATE), 2014,
  • [39] AIRCHITECT: Automating Hardware Architecture and Mapping Optimization
    Samajdar, Ananda
    Joseph, Jan Moritz
    Krishna, Tushar
    2023 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, DATE, 2023,
  • [40] Quantitative Analysis of Information Leakage Hardware Trojans in IP Cores
    Zhang, Senjie
    Wang, Shuai
    Wang, Jinbo
    Zhou, Shan
    Yao, Zhaohui
    Proceedings - 2022 9th International Conference on Dependable Systems and Their Applications, DSA 2022, 2022, : 431 - 436
12345