On automating delayered IC analysis for hardware IP protection

被引:0
|
作者
Sarkar, Esha [1 ]
Maniatakos, Michail [2 ]
机构
[1] Electrical and Computer Engineering Tandon School of Engineering, New York University, United States
[2] Center for Cyber Security, New York University Abu Dhabi, United States
来源
关键词
Automated IC analysis - Automated test pattern generations - Automated tools - Hardware ip protections - Integrated circuits (ICs) - Malicious circuits - Physical inspection - Production cost;
D O I
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学科分类号
摘要
35
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页码:205 / 210
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