A randomised scheme for secured modular exponentiation against power analysis attacks

被引:1
|
作者
Barman M. [1 ]
Mahanta H.J. [1 ]
机构
[1] Department of Computer Science and Engineering, Assam Don Bosco University, Guwahati, Assam
来源
Cyber-Physical Systems | 2019年 / 5卷 / 04期
关键词
CMOS; DPA; modular exponentiation; power analysis attacks; RSA;
D O I
10.1080/23335777.2019.1637944
中图分类号
学科分类号
摘要
This paper presents an approach to compute secured modular exponentiation to mitigate power analysis attacks. Two processes have been designed based on ‘multiply-always’ binary method, which injects dummy multiplications so that the original multiplications can remain intact. The two processes are being invoked based on a random variable, which generated either 0 or 1. With these randomised modular exponentiation, the proposed approach can resist simple and differential power analysis attacks to a large extent. The proposed approach has been implemented using conventional ‘squaring-multiplication’ and ‘Montgomery-Ladder’ methods. Further, the work has also been extended to CRT-RSA, which is widely used for fast computation. The proposed method has been implemented for different key sizes of 1024-bit, 1536-bit and 2048-bit RSA & CRT-RSA. The analysis and results show that with a complexity of O(n), the proposed approach can resist some of the standard DPA attacks on modular exponentiation. © 2019, © 2019 Informa UK Limited, trading as Taylor & Francis Group.
引用
收藏
页码:209 / 230
页数:21
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