Simulation of electrical characteristics and structural optimization for small-scaled dual-gate GeOI MOSFET with high-k gate dielectric

The influences of the main structure and physical parameters of the dual-gate GeOI MOSFET on the device performance are investigated by using a TCAD 2D device simulator.A reasonable value range of germanium （Ge） channel thickness, doping concentration, gate oxide thickness and permittivity is determined by analyzing the on-state current, off-state current, short channel effect（SCE） and drain-induced barrier lowering（DIBL） effect of the GeOI MOSFET.When the channel thickness and its doping concentration are 10–18 nm and （5–9）×10～17 cm-3,and the equivalent oxide thickness and permittivity of the gate dielectric are 0.8–1 nm and 15–30, respectively,excellent device performances of the small-scaled GeOI MOSFET can be achieved: on-state current of larger than 1475 A/ m, off-state current of smaller than 0.1 A/ m, SCE–induced threshold-voltage drift of lower than 60 mV and DIBL-induced threshold-voltage drift of lower than 140 mV.