Fast-Locking Phase Locked Loop Dominated by SMC at VCO Voltage Tuning End

被引：0

作者：

Pu, Hongping ^{[1
,3
]}

Yang, Shiyong ^{[2
,3
]}

Xiong, Xingzhong ^{[2
,3
]}

Liu, Yongchun ^{[2
,3
]}

He, Jian ^{[3
,4
]}

Zheng, Xiaoxia ^{[3
,5
]}

机构：

[1] Chengdu Aeronaut Polytech, Sch Unmanned Aerial Vehicles Ind, Chengdu 610100, Sichuan, Peoples R China

[2] Sichuan Univ Sci & Engn, Sch Automat & Informat Engn, Yibin 644005, Sichuan, Peoples R China

[3] Sichuan Univ Sci & Engn, Artificial Intelligence Key Lab Sichuan Prov, Yibin 644005, Sichuan, Peoples R China

[4] Univ Elect Sci & Technol China UESTC, Yibin Inst, Yibin 644005, Sichuan, Peoples R China

[5] Chengdu Aeronaut Polytech, Sch Automot Engn, Chengdu 610100, Sichuan, Peoples R China

来源：

IEEE ACCESS | 2024年 / 12卷

关键词：

Voltage-controlled oscillators; Phase locked loops; Voltage control; Linear systems; Tuning; Switches; Charge pumps; Sliding mode control; Phase locked loop; sliding mode control; voltage control; PLL;

D O I：

10.1109/ACCESS.2024.3442291

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The presented fast-locking phase-locked loop (PLL) approach, driven by sliding mode control (SMC), aims to maintain defined design parameters and system stability while achieving faster frequency switching. By adding the SMC output control voltage to the tuning terminal of the voltage controlled oscillator (VCO), the PLL system achieves a higher absolute rate of change of the VCO output frequency during frequency hopping. Simulation results in Simulink demonstrate a significant reduction in locking time, from 40 mu s in the conventional PLL to 5 mu s in the proposed PLL, under identical conditions of loop bandwidth and charge pump current.

引用

页码：112135 / 112143

页数：9

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