A Survey of of Side-Channel Attacks and Mitigation for Processor Interconnects

被引:0
|
作者
Yuan, Jie [1 ,2 ]
Zhang, Jing [1 ,2 ]
Qiu, Pengfei [1 ,2 ]
Wei, Xinghai [1 ,2 ]
Liu, Dongxiao [1 ,2 ]
机构
[1] Beijing Univ Posts & Telecommun, Sch Cyberspace Secur, Beijing 100876, Peoples R China
[2] Minist Educ, Key Lab Trustworthy Distributed Comp & Serv BUPT, Beijing 100876, Peoples R China
来源
APPLIED SCIENCES-BASEL | 2024年 / 14卷 / 15期
关键词
processer microarchitecture; interconnect; network-on-chip; side channel; covert channel; NETWORK; SECURITY;
D O I
10.3390/app14156699
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
With advancements in chip technology, the number of cores in modern commercial processors continues to rise, leading to increased complexity in interconnects and on-chip networks. This complexity, however, exposes significant security vulnerabilities, primarily in the form of side-channel and covert-channel exploits. Unlike other microarchitectural side-channel attacks, those leveraging on-chip interconnects utilize unique characteristics, allowing attackers to develop novel methods that can bypass existing effective defenses. In this paper, we present a comprehensive survey of current side-channel and covert-channel attacks based on processor-on-chip interconnects. We categorize these attacks into three types: contention-based, distance-based, and layout-based, according to the specific interconnect characteristics they exploit, and discuss corresponding countermeasures for each. Finally, we provide an outlook on future development trends in processor interconnect side channels. This survey is the first to specifically focus on interconnect-based side channels in processors.
引用
收藏
页数:19
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