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A New Semi-Analytical Model for Erase Transients of 3-D Gate-All-Around (GAA) NAND Flash Memories
被引:0
|作者:
Yoo, Jinil
[1
]
Choi, Haechan
[1
]
Shin, Hyungcheol
[1
]
机构:
[1] Seoul Natl Univ, Interuniv Semicond Res Ctr, Dept Elect & Comp Engn, Seoul 08826, South Korea
关键词:
Mathematical models;
Logic gates;
Numerical models;
Electron traps;
Tunneling;
Transient analysis;
Electrons;
3-D nand flash memory;
amphoteric trap model (ATM);
back tunneling;
continuity equation;
threshold voltage;
RETENTION;
OPERATION;
DYNAMICS;
OXIDE;
D O I:
10.1109/TED.2024.3454284
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
In this article, we introduce a new semi-analytical model to calculate the erase (ERS) transients of 3-D gate-all-around (GAA) nand flash memories. A previously proposed program (PGM) model is revised by adopting the amphoteric trap model (ATM). Injection/escape/back tunneling components are added and the influences of each are investigated. The proposed model makes a better fit with experimental data than the previous model and also successfully implements the back tunneling component.
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页码:6665 / 6671
页数:7
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