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Single- and Multiswitch Fault-Tolerant Inverter Topology With Preserved Output Power and Extreme Learning Machine Fault Detector
被引:0
|作者:
Akbari, Amirhosein
[1
]
Ebrahimi, Javad
[1
]
Bakhshai, Alireza
[1
]
机构:
[1] Queens Univ, Dept Elect & Comp Engn, Kingston, ON K7L 3N6, Canada
基金:
加拿大自然科学与工程研究理事会;
关键词:
Inverters;
Switches;
Circuit faults;
Fault tolerant systems;
Fault tolerance;
Reliability;
Topology;
Extreme learning machine (ELM);
fault detection;
fault-tolerant;
multilevel inverter (MLI);
reliability;
switch faults;
REDUCED DEVICE COUNT;
MULTILEVEL INVERTER;
MODULATION SCHEME;
RELIABILITY;
CONVERTER;
SWITCHES;
D O I:
10.1109/TPEL.2024.3416347
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
Open-circuit and short-circuit faults in switches affect the availability of inverters for high-reliability applications such as military, aerospace, and industrial systems, where a continuous supply of power is crucial. In this article, a five-level inverter structure is proposed that can handle both open-circuit and short-circuit faults for single- and multiswitches. In both healthy and faulty operations, the proposed inverter maintains the rated output power and efficiency. In addition to being a reliable and appropriate candidate for emergency loads, the proposed fault-tolerant inverter topology (FTIT) has several promising features, such as a low number of employed devices, a higher efficiency, and a lower total standing voltage. To demonstrate the superior performance of the proposed topology as compared to state-of-the-art structures, comprehensive comparisons have been made in terms of quantitative comparisons, efficiency, and cost. Moreover, this article performs a detailed reliability analysis to evaluate the proposed FTIT and compares its performance with that of other FTITs. Furthermore, a fault detection method based on an extreme learning machine is proposed for detecting the healthy and faulty operation of the proposed FTIT. Simulation and experimental results are presented for different faulty cases to verify the feasibility of the proposed fault-tolerant inverter topology.
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页码:13177 / 13198
页数:22
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