High-precision single-event transient hardened comparator with the sensitive node transient detection feedback latch technique

被引:0
|
作者
Xie, Yuqiao [1 ,2 ]
Xu, Tao [1 ,2 ]
Liu, Zhongyang [1 ,2 ]
Qiu, Guoji [1 ,2 ]
Bi, Dawei [1 ]
Hu, Zhiyuan [1 ]
Zhang, Zhengxuan [1 ]
Zou, Shichang [1 ]
机构
[1] Chinese Acad Sci, Shanghai Inst Microsyst & Informat Technol, State Key Lab Mat Integrated Circuits, 865 Changning Rd, Shanghai 200050, Peoples R China
[2] Univ Chinese Acad Sci, Beijing, Peoples R China
关键词
analog; comparator; radiation hardening; single-event transient (SET); sensitive node transient detection feedback latch (SNTDFL); triple modular redundancy (TMR); ANALOG; CHARGE; ION; COLLECTION; DESIGN; UPSETS; IMPACT; ICS;
D O I
10.1002/cta.4187
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper comprehensively perfects the sensitive node transient detection feedback latch (SNTDFL) technique, subsequently conceptualizes an ideal hardening structure for the pre-amplification stage, and proposes a radiation hardened by design (RHBD) strategy to cope with the severe single-event transient (SET) effects of high-precision voltage comparators in a space radiation environment. Analysis and verification results show that the hardening strategy exhibits excellent SET hardening performance, which can not only detect extremely small transient voltage disturbances at sensitive nodes but also effectively resist transient current pulses of various intensities generated by SETs. Compared with an unhardened high-precision comparator, the proposed one, hardened with a hybrid strategy of SNTDFL and triple modular redundancy (TMR) techniques, can greatly preserve the original electrical properties and remarkably improve the tolerance of SET with little overhead. In addition, the proposed high-precision comparator significantly reduces static power consumption compared with the one hardened with the TMR technique alone and has a smaller area overhead. This paper comprehensively perfects the sensitive node transient detection feedback latch (SNTDFL) technique, conceptualizes an ideal hardening structure for the pre-amplification stage, and proposes a high-precision comparator hardened with a hybrid strategy of SNTDFL and triple modular redundancy (TMR) techniques. This strategy not only greatly preserves the electrical characteristics but also detects extremely small transient voltage disturbances caused at sensitive nodes and effectively resists transient current pulses of various intensities, remarkably improving the comparator's tolerance to SET. image
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页数:14
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