Analog and linearity performance analysis of ferroelectric vertical tunnel field effect transistor with and without source pocket

被引:1
作者
Singh, Ashish Kumar [1 ]
Kumar, Ramesh [1 ]
Maity, Heranmoy [2 ]
Singh, Prabhat [3 ]
Singh, Sarabdeep [4 ]
机构
[1] Chitkara Univ, Chitkara Univ Inst Engn & Technol, Dept CSE, Chandigarh, Punjab, India
[2] Pailan Coll Management & Technol, Deptartment ECE, Kolkata, India
[3] Dr B R Ambedkar Natl Inst Technol, Dept ECE, Jalandhar 144008, Punjab, India
[4] Model Inst Engn & Technol, Dept ECE, Jammu, India
关键词
band-to-band tunneling (BTBT); energy band diagram; ferroelectric oxide; ferroelectric VTFET; tunnel field effect transistor; GATE; MOSFET; DEVICE; FET; IMPACT;
D O I
10.1002/jnm.3274
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study examines the electrical performance characteristics of a ferroelectric vertical tunnel field-effect transistor (TFET) with and without a source pocket (Si0.5Ge0.5). The incorporation of Germanium in the source of the TFET aims to enhance the on-current. The Silvaco TCAD simulation tool is utilized to simulate the proposed structure. To improve device performance, a ferroelectric layer with a vertical length is employed in the gate of the TFET. When the ferroelectric layer partially controls the channel region, device characteristics, such as on-current and subthreshold swing (SS) can be improved (i.e., ION = 15.21 x 10-5 A/mu m, ION/IOFF = 5.03 x 109, and a minimum SS of 20.87 mV/decade at 300 K). This article studied a comparison between ferroelectric vertical TFETs and nonferroelectric vertical TFETs, as well as ferroelectric vertical TFETs with and without source pockets. The comparison is done on the basis of DC and RF parameters. Analysis of this comparison represents that ferroelectric vertical TFET with source pocket has improved characteristics.
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页数:11
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