A Comprehensive Design Method for Multichip Double-Sided Cooling Power Module With Multidimensional Self-and Mutual Inductances

The double-sided cooling (DSC) packaging configuration, distinguished by its low loop inductance and superior thermal performance, presents a promising solution for multichip silicon carbide (SiC) modules. Nevertheless, challenges persist in the design aspects of current balancing and thermal coupling. This article proposes a comprehensive design method that utilizes the multidimensional self-and mutual inductance coupling effect combined with multiphysics field cosimulation for the packaging design of the multichip power module. This approach effectively resolves the optimization design conflicts in both electrical and thermal characteristics. Based on this method, a DSC SiC power module with three parallel metal-oxide-semiconductor field effect transistors is designed, which has low loop inductance, symmetric branch inductance, as well as even thermal distribution. A fabrication process for the module is presented by iteratively optimizing the process parameters based on the self-packaging platform with pressure silver sintering technique as the core. Simulation results show that the difference in parasitic inductance of parallel branches is less than 0.3 nH. The measured parasitic inductance of the designed power module is 5.8 nH, and the temperature difference between the chips is less than 1.5 degrees C.