High-performance anti-series diode ring amplifier for switched capacitor circuits

被引：0

作者：

Verma, Anmol ^{[1
]}

Srivastava, Shubhang ^{[1
]}

Bhardwaj, Shivam ^{[1
]}

Shah, Ambika Prasad ^{[1
]}

机构：

[1] Indian Inst Technol Jammu, Dept Elect Engn, IC ResQ Lab, Jammu 181221, J&k, India

来源：

INTEGRATION-THE VLSI JOURNAL | 2024年 / 99卷

关键词：

Ring amplifier; Settling time; Dead-zone voltage; Robustness; ADC; CMOS; ADC;

D O I：

10.1016/j.vlsi.2024.102236

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Ring amplifiers enable efficient amplification with less power consumption. These are characterized by fairly power requirements, and innate rail-to-rail output swing and are robust against PVT variations. In this paper, we are presenting an improved self-biased anti-series diode-based ring amplifier (ASD-RAMP) design, implemented on 45-nm CMOS technology. The design uses two diode-connected PMOS transistors that are connected in an anti-series manner to generate a large resistance because of which a high dead-zone voltage is generated. The ASD-RAMP has a settling time of only 4.05 ns, which is nearly half of the conventional self-biased ring amplifier (CSB-RAMP). In comparison to CSB-RAMP, the proposed ASD-RAMP improves the dead-zone voltage by 1 . 1x while requiring 6.76% less power. The circuit is durable and suitable for highperformance applications since it exhibits great resilience to PVT variations in addition to the improved dead zone voltage and reduced settling time.

引用

页数：7

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