Optimising Graph Representation for Hardware Implementation of Graph Convolutional Networks for Event-Based Vision

被引:0
作者
Jeziorek, Kamil [1 ]
Wzorek, Piotr [1 ]
Blachut, Krzysztof [1 ]
Pinna, Andrea [2 ]
Kryjak, Tomasz [1 ,2 ]
机构
[1] AGH Univ Krakow, Dept Automat Control & Robot, Embedded Vis Syst Grp, Krakow, Poland
[2] Sorbonne Univ, LIP6, CNRS, F-75005 Paris, France
来源
DESIGN AND ARCHITECTURES FOR SIGNAL AND IMAGE PROCESSING, DASIP 2024 | 2024年 / 14622卷
关键词
graph representation; GCN; event cameras; object detection; FPGA;
D O I
10.1007/978-3-031-62874-0_9
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Event-based vision is an emerging research field involving processing data generated by Dynamic Vision Sensors (neuromorphic cameras). One of the latest proposals in this area are Graph Convolutional Networks (GCNs), which allow to process events in its original sparse form while maintaining high detection and classification performance. In this paper, we present the hardware implementation of a graph generation process from an event camera data stream, taking into account both the advantages and limitations of FPGAs. We propose various ways to simplify the graph representation and use scaling and quantisation of values. We consider both undirected and directed graphs that enable the use of PointNet convolution. The results obtained show that by appropriately modifying the graph representation, it is possible to create a hardware module for graph generation. Moreover, the proposed modifications have no significant impact on object detection performance, only 0.08% mAP less for the base model and the N-Caltech data set. Finally, we describe the proposed hardware architecture of the graph generation module.
引用
收藏
页码:110 / 122
页数:13
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