From Natural Language Requirements to the Verification of Programmable Logic Controllers: Integrating FRET into PLCverif

被引:1
作者
Adam, Zsofia [1 ,6 ]
Lopez-Miguel, Ignacio D. [3 ,6 ]
Mavridou, Anastasia [4 ]
Pressburger, Thomas [5 ]
Bes, Marcin [2 ]
Vinuela, Enrique Blanco [2 ]
Katis, Andreas [4 ]
Tournier, Jean-Charles [2 ]
Trinh, Khanh, V [4 ]
Adiego, Borja Fernandez [2 ]
机构
[1] Budapest Univ Technol & Econ, Dept Measurement & Informat Syst, Budapest, Hungary
[2] European Org Nucl Res CERN, Geneva, Switzerland
[3] TU Wien, Vienna, Austria
[4] NASA, Ames Res Ctr, KBR, Moffett Field, CA 94035 USA
[5] NASA, Ames Res Ctr, Moffett Field, CA 94035 USA
[6] CERN, Geneva, Switzerland
来源
NASA FORMAL METHODS, NFM 2023 | 2023年 / 13903卷
关键词
D O I
10.1007/978-3-031-33170-1_21
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
PLCverif is an actively developed project at CERN, enabling the formal verification of Programmable Logic Controller (PLC) programs in critical systems. In this paper, we present our work on improving the formal requirements specification experience in PLCverif through the use of natural language. To this end, we integrate NASA's FRET, a formal requirement elicitation and authoring tool, into PLCverif. FRET is used to specify formal requirements in structured natural language, which automatically translates into temporal logic formulae. FRET's output is then directly used by PLCverif for verification purposes. We discuss practical challenges that PLCverif users face when authoring requirements and the FRET features that help alleviate these problems. We present the new requirement formalization workflow and report our experience using it on two critical CERN case studies.
引用
收藏
页码:353 / 360
页数:8
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