Simplified SVPWM Algorithm for Three-Level NPC Converter Based on Virtual Chopping

The computational complexity of the three-level space vector pulsewidth modulation (SVPWM) limits its application in high-switching-frequency converters. To address this issue, this article proposes a simplified SVPWM algorithm based on virtual chopping. First, the reference voltage vector (VV) is adjusted to avoid excessive line-to-line voltage jumps. Second, boundary VVs in the space vector diagram, with simple switching sequences, are chosen as standards. Third, the switching sequence of the reference VV is determined by virtual chopping the corresponding standard VV's. Furthermore, to generate it in the microcontroller, the corresponding modulation waves are obtained. Finally, a method to balance dc-side capacitor voltages is proposed. Consequently, the proposed algorithm simplifies the process, requiring only four equations. The sector determination, dwell time calculation, and allocation are bypassed. Compared with the existing algorithms, the execution time and design complexity of the proposed algorithm in the microcontroller is reduced. The experimental results are presented to verify its effectiveness.