A Machine Learning-Empowered Cache Management Scheme for High-Performance SSDs

被引:2
作者
Sun, Hui [1 ]
Sun, Chen [1 ]
Tong, Haoqiang [1 ]
Yue, Yinliang [2 ]
Qin, Xiao [3 ]
机构
[1] Anhui Univ, Sch Comp Sci & Technol, Hefei 230201, Peoples R China
[2] Zhongguancun Lab, Beijing 100049, Peoples R China
[3] Auburn Univ, Dept Comp Sci & Software Engn, Auburn, AL 36849 USA
基金
中国国家自然科学基金; 美国国家科学基金会;
关键词
Ash; Time factors; Random forests; Standards; Random access memory; Computers; Writing; Cache management schemes; machine Learning; random forest classifier; NAND flash; solid state disks;
D O I
10.1109/TC.2024.3404064
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
NAND Flash-based solid-state drives (SSDs) have gained widespread usage in data storage thanks to their exceptional performance and low power consumption. The computational capability of SSDs has been elevated to tackle complex algorithms. Inside an SSD, a DRAM cache for frequently accessed requests reduces response time and write amplification (WA), thereby improving SSD performance and lifetime. Existing caching schemes, based on temporal locality, overlook its variations, which potentially reduces cache hit rates. Some caching schemes bolster performance via flash-aware techniques but at the expense of the cache hit rate. To address these issues, we propose a random forest machine learning Classifier-empowered Cache scheme named CCache, where I/O requests are classified into critical, intermediate, and non-critical ones according to their access status. After designing a machine learning model to predict these three types of requests, we implement a trie-level linked list to manage the cache placement and replacement. CCache safeguards critical requests for cache service to the greatest extent, while granting the highest priority to evicting request accessed by non-critical requests. CCache - considering chip state when processing non-critical requests - is implemented in an SSD simulator (SSDSim). CCache outperforms the alternative caching schemes, including LRU, CFLRU, LCR, NCache, ML_WP, and CCache_ANN, in terms of response time, WA, erase count, and hit ratio. The performance discrepancy between CCache and the OPT scheme is marginal. For example, CCache reduces the response time of the competitors by up to 41.9% with an average of 16.1%. CCache slashes erase counts by a maximum of 67.4%, with an average of 21.3%. The performance gap between CCache and and OPT is merely 2.0%-3.0%.
引用
收藏
页码:2066 / 2080
页数:15
相关论文
共 44 条
[1]   Basic concepts of artificial neural network (ANN) modeling and its application in pharmaceutical research [J].
Agatonovic-Kustrin, S ;
Beresford, R .
JOURNAL OF PHARMACEUTICAL AND BIOMEDICAL ANALYSIS, 2000, 22 (05) :717-727
[2]  
[Anonymous], 2016, P 11 IEEE ACM IFIP I
[3]  
[Anonymous], 2008, MSR Cambridge Traces
[4]   A STUDY OF REPLACEMENT ALGORITHMS FOR A VIRTUAL-STORAGE COMPUTER [J].
BELADY, LA .
IBM SYSTEMS JOURNAL, 1966, 5 (02) :78-&
[5]  
Chakraborttii Chandranil, 2021, SYSTOR '21: Proceedings of the 14th International Conference on Systems and Storage, DOI 10.1145/3456727.3463784
[6]   ECR: Eviction-cost-aware cache management policy for page-level flash-based SSDs [J].
Chen, Hao ;
Pan, Yubiao ;
Li, Cheng ;
Xu, Yinlong .
CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2021, 33 (15)
[7]   ML-CLOCK: Efficient Page Cache Algorithm Based on Perceptron-Based Neural Network [J].
Cho, Minseon ;
Kang, Donghyun .
ELECTRONICS, 2021, 10 (20)
[8]  
DAN A, 1990, PERF E R SI, V18, P143, DOI 10.1145/98460.98525
[9]  
Fernández-Delgado M, 2014, J MACH LEARN RES, V15, P3133
[10]   DFTL: A Flash Translation Layer Employing Demand-based Selective Caching of Page-level Address Mappings [J].
Gupta, Aayush ;
Kim, Youngjae ;
Urgaonkar, Bhuvan .
ACM SIGPLAN NOTICES, 2009, 44 (03) :229-240