Robustness Assessment Through 77GHz Operating Life Test of Power Amplifier for Radar Applications in 28nm FD-SOI CMOS

被引:0
作者
Cacho, F. [1 ]
Cathelin, P. [1 ]
Hai, J. [1 ]
Bouvot, S. [1 ]
Nowakowski, J. [1 ]
Martinez, M. [1 ]
Debroucke, R. [1 ]
Jean, S. [1 ]
Paulin, R. [1 ]
Antonijevic, J. [1 ]
Federspiel, X. [1 ]
Planes, N. [1 ]
Papotto, G. [2 ]
Parisi, A. [2 ]
Finocchiaro, A. [2 ]
Cavarra, A. [2 ]
Castorina, A. [2 ]
Nocera, C. [2 ]
Palmisano, G. [3 ]
机构
[1] STMicroelectronics, F-38926 Crolles, France
[2] STMicroelectronics, I-95121 Catania, Italy
[3] Univ Catania, DIEEI, I-95125 Catania, Italy
来源
2024 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS 2024 | 2024年
关键词
RF CMOS reliability; Power Amplifier; Operating Life Test;
D O I
10.1109/IRPS48228.2024.10529364
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
RF reliability of a power amplifier is analyzed for automotive applications. Autonomous driving detection based on radar sensors require a high level of reliability to perform the mission during the operative lifetime. The robustness of power amplifier under RF stress is presented in the paper. After introduction of the receiver/transmitter components and phase modulation scheme used in radar sensor, a first analysis is performed at device level to figure out the reliability capability to sustain aggressive voltage profile. Using a 77GHz vectorial load-pull tester, several stresses are carried out to exacerbate the degradation of a LVT NMOS in 28nm FD-SOI technology, used as a power stage. With special tuning of the biasing point, input and output matching networks and input power, is it possible to generate voltage profile that mimics a load-line of class-AB power amplifier, or a RF voltage profile centered in the worst-case hot carrier DC condition, i.e. V-DS close to V-GS. Results show small degradation for these two RF profiles. Then, in the second part, Operating Life Test is performed at 77GHz with a dedicated test chip where RF signal is build-in and output amplified power is measured with a power meter. Characterization of the output power is performed both in the on-wafer and the on-board version. The result of 1500h burn-in for several parts is presented. The degradation magnitude during the stress is in agreement with simulation.
引用
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页数:6
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