Dual-Layer Dielectric Stack for Thermally Isolated Low-Energy Phase-Change Memory

被引:31
作者
Fong, Scott W. [1 ,2 ]
Neumann, Christopher M. [1 ,2 ]
Yalon, Eilam [1 ,2 ]
Rojo, Miguel Munoz [1 ,2 ]
Pop, Eric [1 ,2 ]
Wong, H. -S. Philip [1 ,2 ]
机构
[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA
[2] Stanford Univ, Stanford SystemX Alliance, Stanford, CA 94305 USA
基金
美国国家科学基金会;
关键词
Phase-change memory (PCM); reset energy; thermal conductivity; thermal design; CONDUCTIVITY;
D O I
10.1109/TED.2017.2756071
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High reset energy is an ongoing issue for phase-change memory (PCM) devices. Prior work demonstrates that smaller PCM switching volume and thermal isolation can reduce the reset energy. In this paper, we fabricate and measure a planar confined PCM device with a multilayer dual-layer stack (DLS) of SiO2/Al2O3 insulator. Devices with contact area of 500 x 20 nm and lengths of 2 mu m show exceptionally low reset energies of 18.25 +/- 15.8 pJ and low reset current densities of 0.94 +/- 0.51 MA/cm(2). Implementing the DLS enables a 60% reduction in reset energy compared with SiO2-isolated devices.
引用
收藏
页码:4496 / 4502
页数:7
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