Algorithm-Hardware Co-Design for Wearable BCIs: An Evolution from Linear Algebra to Transformers

被引:0
作者
Park, Sunyoung [1 ,2 ]
Byun, Wooseok [3 ]
Je, Minkyu [4 ]
Kim, Ji-Hoon [1 ,2 ]
机构
[1] Ewha Womans Univ, Dept Elect & Elect Engn, Seoul, South Korea
[2] Ewha Womans Univ, Grad Program Smart Factory, Seoul, South Korea
[3] SAPEON Korea Inc, Seongnam, South Korea
[4] Korea Adv Inst Sci & Technol, Sch Elect Engn, Daejeon, South Korea
来源
2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024 | 2024年
关键词
Brain-computer interface (BCI); transformer; neural network; algorithm-hardware co-design; domain-specific architecture;
D O I
10.1109/ISCAS58744.2024.10558514
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Recent advancements in brain-computer interface (BCI) technology for steady-state visual evoked potential (SSVEP)-based target identification have shifted from traditional linear algebra (LA) techniques to more sophisticated neural network (NN) approaches, driven by their increased accuracy and consistent performance across different subjects. However, adopting NN-based algorithms has introduced complexities in wearable BCI systems, mainly due to their extensive parameter sets that demand significant memory capacity. Moreover, the computational intensity of these models requires reevaluating hardware architectures. Additionally, the advent of Transformerbased models has further advanced the state of the art, providing even higher accuracy and reduced variability in cross-subject performance, placing greater demands on hardware resources. This paper provides an overview of recent algorithmic progress in SSVEP-based target identification. Also, it proposes considerations for the hardware architecture needed to efficiently support the computation of cutting-edge Transformer-based models in wearable BCIs from the perspective of algorithm-hardware codesign.
引用
收藏
页数:5
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