Boosting the Efficiency of Quantum Divider through Effective Design Space Exploration

被引:1
|
作者
Wang, Siyi [1 ]
Lim, Eugene [1 ]
Chattopadhyay, Anupam [1 ]
机构
[1] Nanyang Technol Univ, Sch Comp Sci & Engn, Singapore, Singapore
来源
2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024 | 2024年
基金
新加坡国家研究基金会;
关键词
Quantum Computing; Quantum Arithmetic; Efficiency Optimization; Non-restoring Divider; Quantum Simulation;
D O I
10.1109/ISCAS58744.2024.10557991
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Rapid progress in the design of scalable, robust quantum computing necessitates efficient quantum circuit implementation for algorithms with practical relevance. For several algorithms, arithmetic kernels, in particular, division plays an important role. In this manuscript, we focus on enhancing the performance of quantum slow dividers by exploring the design choices of its sub-blocks, such as, adders. Through comprehensive design space exploration of state-of-the-art quantum addition building blocks, our work have resulted in an impressive achievement: a reduction in Toffoli Depth of up to 93.90%, accompanied by substantial reductions in both Toffoli and Qubit Count of up to 92.12% and 99.38%, respectively. This paper offers crucial perspectives on efficient design of quantum dividers, and emphasizes the importance of adopting a systematic design space exploration approach.
引用
收藏
页数:5
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