A Quasi-Cyclic LDPC Based Low Complexity and Area-Efficient Communication System for IEEE 802.11n

Low-density parity-check (LDPC) code, which has an excellent error-correcting performance that is close to the Shannon limit, is the most often used error correction code (ECC) for reliable and effective communication. Despite higher performance and lower decoding complexity, the main disadvantage of LDPC codes is their high encoding complexity. A significant problem is the VLSI implementation of the LDPC encoder and decoder. In this paper, structured LDPC codes-also known as quasi-cyclic low-density parity check codes-have been used since it is good bit error ratio (BER) performance and adaptable hardware execution characteristics. The Complete (EncoderChannel-Decoder) communication system with a 1/2 code rate, 648 bits codeward length, and sub-block size of z = 27 has been constructed for the IEEE 802.11n wireless standard.