Nonlinear Circuit Macromodeling Using New Heterogeneous-Layered Deep Clockwork Recurrent Neural Network

被引:2
|
作者
Azodi, Maedeh [1 ]
Sadrossadat, Sayed Alireza [1 ]
Savaria, Yvon [2 ]
机构
[1] Yazd Univ, Dept Comp Engn, Yazd 8915818411, Iran
[2] Polytech Montreal, Dept Elect Engn, Montreal, PQ H3T 1J4, Canada
来源
IEEE ACCESS | 2024年 / 12卷
关键词
Integrated circuit modeling; Recurrent neural networks; Solid modeling; Computational modeling; Clocks; Nonlinear circuits; Long short term memory; Computer-aided design; clockwork recurrent neural network; deep neural network; heterogeneous structure; macromodeling; nonlinear circuits; recurrent neural network;
D O I
10.1109/ACCESS.2024.3420255
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Nonlinear circuit modeling is a complex task involving sequential data and time-domain analysis. While Recurrent Neural Networks (RNNs) handle these tasks, their limitations include low test accuracy and extended training times. Deep time-domain networks, like deep recurrent neural networks (DRNNs) and deep long short-term memory (DLSTM), aim to address these limitations but bring challenges such as long training times, the vanishing gradient problem, overfitting, and significant test errors due to their large number of parameters. This paper proposes a novel structure and macromodeling approach for nonlinear circuits based on deep clockwork recurrent neural networks (DCWRNNs). Deep CWRNNs offer better feature extraction capability than their shallow counterparts and can generate more accurate and faster models than conventional DRNN and DLSTM. Its unique structure with deep modules operating at different clock periods facilitates better extraction of high and low-frequency information, resulting in smaller test errors. A Heterogeneous-layered DCWRNN (HL-DCWRNN) is also introduced, adjusting module rates of each layer separately to enhance accuracy and mitigate overfitting. DCWRNN-based models require less computation effort (20-30 speedup reported) than transistor-level circuit simulator models. Validation through modeling two nonlinear high-speed interconnect circuits confirms the method's efficacy compared to DRNN, DLSTM, and shallow CWRNN methods.
引用
收藏
页码:89506 / 89519
页数:14
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