Co-design based FPGA implementation of an efficient new speech hyperchaotic cryptosystem in the transform domain

被引:2
|
作者
Azzaz, Mohamed Salah [1 ]
Kaibou, Redouane [1 ]
Madani, Bachir [1 ]
机构
[1] Ecole Mil Polytech, Lab Syst Elect & Numer, Algiers, Algeria
关键词
Speech; Cryptosystem; FPGA; Co-design; Chaotic; DWT; Real-time; Communication; Embedded; CHAOTIC OSCILLATOR; MAP;
D O I
10.1016/j.vlsi.2024.102197
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper a new encryption system has been designed and implemented for real-time speech transmission to reduce bandwidth requirements, increase security and minimize residual intelligibility. To guarantee robustness and lightweight computation, the developed cryptosystem has been carried out in the wavelet transform domain based on a hyperchaotic model to generate mask and permutation keys. The cryptographic system has been designed using a hardware-software (HW/SW) co-design approach by developing several IP-cores in a relatively short development time. The performances and security evaluation of the system have been validated through simulation results followed by an experimental validation through the implementation of an encrypted speech signal transmission between two low cost Nexys-4 DDR FPGA platforms, operating in real-time for both wired and wireless communications. Compared to similar works, high performances have been obtained in terms of bandwidth efficiency due to the use of DWT, limited area of FPGA resources, low power consumption and high security level with a large keyspace that is sufficient to resist against brute force attacks. The designed system can be a very useful solution for many real-time secure integrated voice communication systems, multiple communication purposes, military, professional or personal high level of conversations security.
引用
收藏
页数:13
相关论文
共 50 条
  • [21] Efficient HW/SW Co-design of FPGA Accelerator to Detect Anomaly Attacks in Smart Grids
    Liu, Hongsen
    Liu, Guangyi
    Li, Shizhong
    Meng, Wenchao
    Wang, Lin
    Sun, Yong
    2024 33RD INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, ISIE 2024, 2024,
  • [22] Toward Efficient Co-Design of CNN Quantization and HW Architecture on FPGA Hybrid-Accelerator
    Zhang, Yiran
    Li, Guiying
    Yuan, Bo
    2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024, 2024, : 678 - 683
  • [23] Acceleration of image processing algorithms based on a Single Board Computer and FPGA co-design
    Kokotis, Petros
    Vourvoulakis, John
    2022 11TH INTERNATIONAL CONFERENCE ON MODERN CIRCUITS AND SYSTEMS TECHNOLOGIES (MOCAST), 2022,
  • [24] WPU: A FPGA-based Scalable, Efficient and Software/Hardware Co-design Deep Neural Network Inference Acceleration Processor
    Xie, Xie
    Wu, Chang
    2021 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE BIG DATA AND INTELLIGENT SYSTEMS (HPBD&IS), 2021, : 1 - 5
  • [25] LVTTL Based Energy Efficient Watermark Generator Design and Implementation on FPGA
    Pandey, B.
    Kaur, Amanpreet
    Kumar, T.
    Das, T.
    Rahman, M. A.
    Hussain, D. M. Akbar
    2014 INTERNATIONAL CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGY CONVERGENCE (ICTC), 2014, : 642 - 646
  • [26] HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem
    Lee, Chang-Hyeon
    Lee, Jae-Hyeok
    Jung, Haesung
    Lee, Hanyoung
    Lee, Hanho
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2024, 24 (03) : 191 - 198
  • [27] Efficient Implementation of QRD-RLS Algorithm using Hardware-Software Co-design
    Lodha, Nupur
    Rai, Nivesh
    Krishnamurthy, Aarthy
    Venkataraman, Hrishikesh
    2009 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-5, 2009, : 2973 - +
  • [28] An Efficient FPGA Based Implementation of Forward Integer Transform and Quantization Algorithm of H.264
    Mukherjee, Rohan
    Banerjee, Anupam
    Chakrabarti, Indrajit
    Dutta, Pranab Kumar
    Ray, Ajoy Kumar
    PROCEEDINGS OF 2016 IEEE INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING, VLSI, ELECTRICAL CIRCUITS AND ROBOTICS (DISCOVER), 2016, : 283 - 288
  • [29] Design and implementation of a new lightweight chaos-based cryptosystem to secure IoT communications
    Kifouche, Abdenour
    Azzaz, Mohamed Salah
    Hamouche, Redha
    Kocik, Remy
    INTERNATIONAL JOURNAL OF INFORMATION SECURITY, 2022, 21 (06) : 1247 - 1262
  • [30] FADEC: FPGA-based Acceleration of Video Depth Estimation by HW/SW Co-design
    Hashimoto, Nobuho
    Takamaeda-Yamazaki, Shinya
    2022 21ST INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (ICFPT 2022), 2022, : 103 - 111