A Comparative Review: Performance parameters of Fin, Nanowire and Nanosheet Field Effect Transistors on 5nm node

被引:0
作者
Karutharaja, V. [1 ]
Balamurugan, N. B. [1 ]
Suguna, M. [2 ]
Kumar, D. Sriram [3 ]
机构
[1] Thiagarajar Coll Engn, Dept ECE, Madurai, Tamil Nadu, India
[2] Thiagarajar Coll Engn, Dept TT, Madurai, Tamil Nadu, India
[3] Natl Inst Technol, Dept ECE, Tiruchirappalli, Tamil Nadu, India
来源
2024 7TH INTERNATIONAL CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS, ICDCS 2024 | 2024年
关键词
FinFETs; Nanowire FET; Gate-All-Around Nanosheet FETs; Threshold Voltage (VT); Drain-induced barrier lowering (DIBL);
D O I
10.1109/ICDCS59278.2024.10561084
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a review is conducted on the novelties in the design, functionality, and dependability of the suggested Gate All Around - Nanosheet Field Effect Transistors (GAA-NSHFETs). The exceptional low power characteristics of the GAA-NSHFETs are gaining widespread recognition in the semiconductor industry. Because of its superior gate controllability with the sheet shaped channel, The most desirable key design that could take the place of the FinFET below a 5-nm technological node is thought to be a GAA Nanosheet FET. The GAA-NSHFET has good controllability of gate for the stacked NSH channels and it is able to minimize the short channel effects (SCEs). Contemporary FinFETs and Nanowire FET (NWFET) devices are anticipated to be superseded by GAA-NSHFETs. Future advancements that will be needed to scale GAA-NSHFETs and other technologies are analyzed and discussed.
引用
收藏
页码:308 / 312
页数:5
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