A Double Cross-Coupled Delay Cell for High-Frequency Differential Ring VCOs

被引:1
作者
Singh, Mayank Kumar [1 ]
Gautam, Manish Kumar [1 ]
Singh, Puneet [1 ]
Nagulapalli, R. [2 ]
Das, Devarshi Mrinal [1 ]
Sakare, Mahendra [1 ]
机构
[1] Indian Inst Technol Ropar, Rupnagar, Punjab, India
[2] Oxford Brookes Univ, Oxford OX3, England
来源
2023 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS | 2024年
关键词
Voltage-controlled oscillator; differential delay cell; impulse sensitivity function; phase noise; PHASE-NOISE; OSCILLATOR;
D O I
10.1109/APCCAS60141.2023.00013
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a double cross-coupled delay cell (DCC-Delay cell) incorporated in a two-stage ring voltage-controlled oscillator (RVCO) that enhances its operating frequency. The DCC-Delay cell employs two cross-coupled transistor pairs, one in a pull-up network and the other in a pull-down network. This design configuration effectively reduces the time required for discharging the output node, allowing for higher operating frequencies. The RVCO's frequency is controlled by a PMOS transistor-based capacitance between the two output nodes. Simulations were performed in 65nm CMOS technology after post-layout parasitic extraction using a 1V supply voltage. The phase noise of DCC-Delay cell-based RVCO is -103.4 dBc/Hz at an offset frequency of 1 MHz, operating at 1.2GHz while dissipating 6.2mW power. The DCC-Delay cell-based RVCO achieves a 55% improvement in operating frequency compared to conventional RVCO while experiencing only slightly increasing power dissipation. The figure of merit (FOM) of the DCC-Delay cell-based RVCO is -157 dBc/Hz at a 1MHz offset frequency, rivaling other RVCO architectures in the existing literature.
引用
收藏
页码:1 / 5
页数:5
相关论文
共 18 条
[1]  
Abidi A. A., 1999, 1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453), P151, DOI 10.1109/VTSA.1999.786023
[2]   A Two-Stage Ring Oscillator in 0.13-μm CMOS for UWB Impulse Radio [J].
Fahs, Bassem ;
Ali-Ahmad, Walid Y. ;
Gamand, Patrice .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2009, 57 (05) :1074-1082
[3]   Design of CML Ring Oscillators With Low Supply Sensitivity [J].
Gui, Xiaoyan ;
Green, Michael M. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2013, 60 (07) :1753-1763
[4]   Jitter and phase noise in ring oscillators [J].
Hajimiri, A ;
Limotyrakis, S ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (06) :790-804
[5]   A general theory of phase noise in electrical oscillators [J].
Hajimiri, A ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (02) :179-194
[6]   Relation Between Delay Line Phase Noise and Ring Oscillator Phase Noise [J].
Homayoun, Aliakbar ;
Razavi, Behzad .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2014, 49 (02) :384-391
[7]   A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM [J].
Jiang, Tongquan ;
Yin, Jun ;
Mak, Pui-In ;
Martins, Rui P. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019, 66 (02) :157-161
[8]   A Low-Noise Four-Stage Voltage-Controlled Ring Oscillator in Deep-Submicrometer CMOS Technology [J].
Kim, Joo-Myoung ;
Kim, Seungjin ;
Lee, In-Young ;
Han, Seok-Kyun ;
Lee, Sang-Gug .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2013, 60 (02) :71-75
[9]   New dual-loop topology for ring VCOs based on latched delay cells [J].
Kovacs, Istvan ;
Neag, Marius .
2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
[10]   Delay Modulation in Separately Driven Delay Cells Utilized for the Generation of High-Performance Multiphase Signals Using ROs [J].
Mishra, Neeraj ;
Dani, Lalit M. ;
Chakraborty, S. ;
Joshi, Rajiv, V ;
Bulusu, Anand .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2022, 69 (01) :30-34