Controlled integration of InP nanoislands with CMOS-compatible Si using nanoheteroepitaxy approach

被引:1
|
作者
Kamath, Anagha [1 ]
Ryzhak, Diana [2 ]
Rodrigues, Adriana [1 ]
Kafi, Navid [1 ]
Golz, Christian [1 ]
Spirito, Davide [2 ]
Skibitzki, Oliver [2 ]
Persichetti, Luca [3 ,4 ]
Schmidbauer, Martin [5 ]
Hatami, Fariba [1 ]
机构
[1] Humboldt Univ, Inst Phys, Newtonstr 15, D-12489 Berlin, Germany
[2] Leibniz Inst Innovat Mikroelekt, IHP, Technol Pk 25, D-15236 Frankfurt, Oder, Germany
[3] Univ Roma Tre, Dipartimento Sci, Viale G Marconi 446, I-00146 Rome, Italy
[4] Univ Roma Tor Vergata, Dipartimento Fis, Via Ric Sci 1, I-00133 Rome, Italy
[5] Leibniz Inst Kristallzuchtung, Max Born Str 2, D-12489 Berlin, Germany
关键词
Indium phosphide; Silicon nanotips; CMOS technology; Nanoheteroepitaxy; Optoelectronics; OPTICAL-PROPERTIES; SEMICONDUCTOR; EPITAXY;
D O I
10.1016/j.mssp.2024.108585
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Indium phosphide (InP) nanoislands are grown on pre-patterned Silicon (001) nanotip substrate using gassource molecular-beam epitaxy via nanoheteroepitaxy approach. The study explores the critical role of growth temperature in achieving selectivity, governed by diffusion length. Our study reveals that temperatures of about 480 degrees C and lower, lead to parasitic growth, while temperatures about 540 degrees C with an indium growth rate of about 0.7 & Aring;.s-1 and phosphine flux of 4 sccm inhibit selective growth. The establishment of an optimal temperature window for selective InP growth is demonstrated for a temperature range of 490 degrees C to 530 degrees C. Comprehensive structural and optical analyses using atomic force microscopy, Raman spectroscopy, x-ray diffraction, and photoluminescence confirm a zincblende structure of indium phosphide with fully relaxed islands. These results demonstrate the capability to precisely tailor the position of InP nanoislands through a noncatalytic nanoheteroepitaxy approach, marking a crucial advancement in integrating InP nanoisland arrays on silicon devices.
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页数:6
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