Aging-Aware Energy-Efficient Task Deployment of Heterogeneous Multicore Systems

被引:0
|
作者
Chen, Yu-Guang [1 ]
Wang, Chieh-Shih [2 ]
Lin, Ing-Chao [2 ]
Chen, Zheng-Wei [1 ]
Schlichtmann, Ulf [3 ]
机构
[1] Natl Cent Univ, Dept Elect Engn, Taoyuan 320, Taiwan
[2] Natl Cheng Kung Univ, Dept Comp Sci & Informat Engn, Tainan 701, Taiwan
[3] Tech Univ Munich, Chair Elect Design Automat, D-80333 Munich, Germany
关键词
Multicore processing; Task analysis; Aging; Computer architecture; Thermal variables control; Negative bias temperature instability; Timing; Aging degradation; asymmetric aging; energy; heterogeneous multicore system; lifetime; negative bias temperature instability (NBTI); reliability; OPTIMIZATION; SELECTION;
D O I
10.1109/TCAD.2023.3323163
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Heterogeneous multicore systems, which consist of high-performance and power-efficient cores, are emerging to satisfy the various demands on performance and power consumption. On the other hand, as CMOS technology continues to shrink in size, the aging effect, which can cause performance degradation or timing failures, has become a non-negligible threat to lifetime reliability. To overcome the challenges under the aging effect, various approaches have been proposed in previous studies. Most previous studies, however, did not consider the different characteristics of big and little cores. In addition, most of them do not consider critical tasks with the strict timing requirements present in real-time applications, resulting in early system failure. Therefore, considering different characteristics of cores and the presence of critical tasks, we propose an aging-aware task deployment framework for real-time systems. In this framework, for high-performance big cores, we propose a novel asymmetric aging-aware strategy. This strategy finds an energy-efficient task-to-core assignment to reserve some healthy cores at the early system life stage. The reserved cores are kept idle with the lowest voltage and can execute critical tasks at the late system life stage, extending the system lifetime. Meanwhile, the nonreserved cores use lower voltages to execute tasks, reducing the aging effect. For energy-efficient little cores, we adopt the symmetric aging-aware strategy to balance out the aging effect of each little core. With a balanced aging effect, the utilization of little cores is improved. In addition, we propose voltage/frequency boosting and task migration techniques to increase the number of cores that can meet the task timing constraints. Compared to the state of the art, the proposed framework can achieve 1.10x lifetime improvement and 5% energy reduction.
引用
收藏
页码:1580 / 1593
页数:14
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