Low-Temperature Area-Selective Metal Passivation Bonding Platform for Heterogeneous Integration

被引:1
|
作者
Hsu, Mu-Ping [1 ]
Tsai, Wen-Tsu [2 ]
Chen, Chi-Yu [3 ]
Kuo, Tzu-Ying [4 ]
Lee, Ou-Hsiang [4 ]
Chang, Hsiang-Hung [4 ]
Chen, Kuan-Neng [1 ]
机构
[1] Natl Yang Ming Chiao Tung Univ, Inst Elect, Hsinchu 30010, Taiwan
[2] Natl Yang Ming Chiao Tung Univ, Int Coll Semicond Technol, Hsinchu 30010, Taiwan
[3] Natl Yang Ming Chiao Tung Univ, Inst Pioneer Semicond Innovat, Hsinchu 30010, Taiwan
[4] Ind Technol Res Inst ITRI, Elect & Optoelect Syst Res Labs, Hsinchu 310401, Taiwan
关键词
Bonding; Passivation; Gold; Films; Plasmas; Robustness; Temperature measurement; 3D integration; chiplet; Cu bonding; passivation structure;
D O I
10.1109/LED.2024.3401222
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study explores a novel area-selective passivation bonding technology utilizing gold, a crucial facilitator for heterogeneous integration, which fulfills the urgent demand for high-performance computing (HPC). This mask-free patterning bonding technology allows for chip bonding at ambient temperatures under 120 degrees C within a short timeframe, successfully mitigating copper oxidation and post-chemical mechanical polishing (CMP) dishing issues without additional high-cost lithography. The technology, with its area-selective features, proves versatile for a variety of bonding structures, such as copper pillars, interconnect Cu-Cu, and Cu/SiO2 bonding, circumventing lithography issues and streamlining the traditional metal passivation bonding process. Our investigation confirms the superior quality and robustness of these area-selective films, together with the robust electrical performance of both interconnect Cu-Cu and Cu/SiO2 hybrid bonding devices.
引用
收藏
页码:1273 / 1276
页数:4
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