A 0.4-6-GHz Blocker-Tolerant Receiver in 65-nm CMOS With Bandwidth-Extended Technologies for Future V2X Applications

被引：3

作者：

Luo, Zelu ^{[1
]}

Chen, Qian ^{[1
]}

Dong, Haoyu ^{[1
]}

Yao, Yi ^{[1
]}

Mai, Songping ^{[1
]}

Tang, Xian ^{[1
]}

Xing, Xinpeng ^{[1
]}

Feng, Haigang ^{[1
]}

Wang, Zhihua ^{[2
]}

机构：

[1] Tsinghua Univ, Shenzhen Int Grad Sch, Shenzhen 518000, Peoples R China

[2] Tsinghua Univ, Sch Integrated Circuits, Beijing 100084, Peoples R China

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2024年 / 71卷 / 05期

关键词：

Impedance; Receivers; Radio frequency; IP networks; Noise measurement; Parasitic capacitance; Vehicle-to-everything; V2X; multi-mode; wideband receiver; blocker tolerant; current mode; noise canceling; N-path; NOISE-CANCELING RECEIVER;

D O I：

10.1109/TCSII.2024.3351180

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 0.4-6 GHz multi-mode blocker-tolerant receiverimplemented in 65 nm CMOS process is presented. A pi-typeCapacitor-Inductor-Capacitor (CLC) current matching networkis proposed for N-path-based bandpass low noise transcon-ductance amplifier (BLNTA) to extend bandwidth. Moreover,an improved NAND-based windmill divider is proposed toexpand the upper frequency of clocks to at least 8 GHz inall corners. Adaptive bias circuits are introduced to stabi-lize performance. Measurement results show that the receivercan achieve frequency selectivity in all 0.4-6 GHz bands. Thereceiver's maximum gain is 37 dB, with the minimum doublesideband (DSB) noise figure (NF) of 3.4 dB. The in-band (IB)input third-order intercept point (IIP3) is-1.2 dBm, and the out-of-band (OoB) IIP3 is 13.9 dBm. The overall power consumptionis 46.5 mW+2.5 mW/GHz. The receiver aims to support cellularprotocols for vehicle-to-everything (V2X) applications.

引用

页码：2634 / 2638

页数：5

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