共 31 条
- [22] FPTree: A Hybrid SCM-DRAM Persistent and Concurrent B-Tree for Storage Class Memory SIGMOD'16: PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON MANAGEMENT OF DATA, 2016, : 371 - 386
- [23] Workload-Based Co-Design of Non-Volatile Cache Algorithm and Storage Class Memory Specifications for Storage Class Memory/NAND Flash Hybrid SSDs IEICE TRANSACTIONS ON ELECTRONICS, 2017, E100C (04): : 373 - 381
- [24] A Resistance-Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage-Class Memory Applications 2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2016, 59 : 134 - U179
- [27] An adaptive L2 cache prefetching mechanism for effective exploitation of abundant memory bandwidth of 3-D IC technology IEICE ELECTRONICS EXPRESS, 2013, 10 (16):
- [28] 3D AND: A 3D Stackable Flash Memory Architecture to Realize High-Density and Fast-Read 3D NOR Flash and Storage-Class Memory 2020 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2020,
- [30] A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications ESSCIRC 2005: PROCEEDINGS OF THE 31ST EUROPEAN SOLID-STATE CIRCUITS CONFERENCE, 2005, : 355 - 358