Transient Overvoltage Detection Technique for GaN HEMTs Integrated in a 200-V GaN-on-SOI Process

被引:8
作者
Murray, S. K. [1 ]
Jiang, W. L. [1 ]
Zaman, M. S. [1 ]
De Vleeschouwer, H. [2 ]
Moens, P. [2 ]
Roig, J. [2 ]
Trescases, O. [1 ]
机构
[1] Univ Toronto, Edward S Rogers Sr Dept Elect & Comp Engn, Toronto, ON, Canada
[2] On Semicond, Oudenaarde, Belgium
来源
2022 IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, APEC | 2022年
基金
加拿大自然科学与工程研究理事会;
关键词
D O I
10.1109/APEC43599.2022.9773399
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Precise control of the applied gate voltage is essential for GaN HEMTs as the margin between their recommended and maximum gate voltages can be as low as 1V. This work presents a GaN power IC with a driver that samples the duration of gate overvoltage during turn-on transients. The overvoltage detection circuitry compares the on-chip gate voltage of the power device with an externally-set reference. During a gate overvoltage event, a pre-charged hold-capacitor is discharged, with the final capacitor voltage indicating the total overvoltage duration. With this single-die solution, the overvoltage period can be measured without the distortion that occurs when observing a high dv/dt signal through bond wire and PCB parasitic elements. The overvoltage detection circuitry is fabricated in a 200-V GaN-on-SOI process alongside an 80-m Omega e-HEMT with an integrated gate driver. Experimental characterization shows that the change in capacitor voltage is a strong predictor of the overvoltage duration, paving the way for using such a system for optimization in active gate drive scenarios.
引用
收藏
页码:1400 / 1405
页数:6
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