A novel 3D packaging technology for high-reliability applications

被引:0
作者
Liu, Mifeng [1 ]
Zhou, Yi [1 ]
Dai, Jie [1 ]
Qiao, Qi [1 ]
Wang, Jing [1 ]
Chen, Kai [1 ]
机构
[1] Shanghai Aerosp Elect & Commun Equipment Res Inst, Shanghai, Peoples R China
来源
2023 24TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT | 2023年
关键词
3D packaging; stacking; solid-state memory; module;
D O I
10.1109/ICEPT59018.2023.10491953
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A novel 3D packaging technology for high-reliability applications was proposed in this paper. The Kovar pins were set at the bottom of the module, and the soldering area of the pin and the PCB was increased by several times without increasing the X-Y plane size of the 3D packaging module. So the reliability of electrical connection and mechanical connection between the 3D packaging module and PCB could be significantly improved. A 128Gbit solid-state memory (SSM) module was prepared by the 3D packaging technology, and there were 8 NAND flash dies with a memory capacity of 16 Gbit were stacked in the module. The size of module was 19.2mm x 13.6mm x 3.0 mm, and the weight is only 2.1g. The AC/DC parameter test result met the requirements of the chip datasheet, and the function ran without abnormalities. And the SSM module also passed stable baking (+125 degrees C, 72h), temperature cycling (-55 similar to+125 degrees C,10 times), and constant acceleration (30000g, 1min) environmental tests, which could meet the requirements of high-reliability application.
引用
收藏
页数:4
相关论文
共 8 条
[1]  
Chen L, 2017, Die and Package Level Thermal and Thermal/Moisture Stresses in 3D Packaging: Modeling and Characterization
[2]   Integrated circuit packaging review with an emphasis on 3D packaging [J].
Lancaster, Austin ;
Keswani, Manish .
INTEGRATION-THE VLSI JOURNAL, 2018, 60 :204-212
[3]   A transceiver frequency conversion module based on 3D micropackaging technology [J].
Liu Boyuan ;
Wang Qingping ;
Wu Weiwei ;
Yuan Naichang .
JOURNAL OF SYSTEMS ENGINEERING AND ELECTRONICS, 2020, 31 (05) :899-907
[4]   TSV Interposer Fabrication for 3D IC Packaging [J].
Rao, Vempati Srinivasa ;
Wee, Ho Soon ;
Vincent, Lee Wen Sheng ;
Yu, Li Hong ;
Ebin, Liao ;
Nagarajan, Ranganathan ;
Chong, Chai Tai ;
Zhang, Xiaowu ;
Damaruganath, Pinjala .
2009 11TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC 2009), 2009, :431-437
[5]  
Sun T, 2019, 2019 IEEE 69 EL COMP
[6]   Reliability challenges in 3D IC packaging technology [J].
Tu, K. N. .
MICROELECTRONICS RELIABILITY, 2011, 51 (03) :517-523
[7]  
Xie HQ, 2013, 2013 14TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), P64, DOI 10.1109/ICEPT.2013.6756423
[8]  
Zhou Y, 2017, 2017 18TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), P1130, DOI 10.1109/ICEPT.2017.8046640