PID Controller Tuning of Voltage Mode Controlled Buck Converter for Fast Recovery up to Slew Limit

Existing design methods under voltage mode control (VMC) are carried out using perturbed linear small-signal models (SSMs), and the design works fine in a synchronous buck converter if the control bandwidth f(c) is set to f(c) <= f(sw)/10, where f(sw) is the switching frequency. In this paper, small-signal based tuning of a practical PID controller and a typeIII compensator is discussed in a VMC buck converter, and the model validity aspects are presented using simulation results. For individual cases, the closed-loop bandwidth f(c) is limited to a fraction of fsw, and the performance limit under VMC is due to the model limit and because of ignoring ripple information. Further, a nonlinear PID controller tuning method is proposed in a VMC buck converter using large-signal models. This can achieve proximate time optimal recovery, in which the closed-loop performance can be improved up to the slew rate limit of the converter. Stability and robustness analysis are presented. A comparative study is considered using simulation results to demonstrate load transient performances using small-signal and large-signal based design approaches. Finally, the proposed large-signal based PID tuning is validated experimentally in a VMC buck converter.