Defect Reduction And Line Width Roughness (LWR) improvement By Using A Post Precoat Treatment (PPT) In Waferless Chamber Conditioning (WCC)

Defect and line width roughness are two main yield detractors in advanced bitline dry etch process in high-volume DRAM memory manufacturing. In this paper, we present the results of defect reduction and LWR improvement by using a Post Pre-coat Treatment method in Waferless Chamber Clean recipe. Adding a PPT step at the end of WCC recipe reduces defect, inline critical dimension (CD) and LWR. Atomic force microscopy (AFM) results show pre-coat silicon oxide and/or PPT improves surface roughness by 30%. X-ray photoelectron spectroscopy (XPS) has been utilized to characterize the surfaces treated with and without PPT, indicating PPT can remove residue chloride and solidify SiO2 film from its loose form. With the implementation of WCC with PPT, we have achieved 0.15% yield gain which is resulted from defect reduction, tighter inline CD and LWR improvement.