Exploring Innovative IGZO-channel based DRAM Cell Architectures and Key Technologies for Sub-10nm Node

被引：4

作者：

Ha, Daewon ^{[1
]}

Lee, Y. ^{[1
]}

Yoo, S. ^{[1
]}

Lee, W. ^{[1
]}

Cho, M. H. ^{[1
]}

Yoo, K. ^{[1
]}

Lee, S. M. ^{[1
]}

Lee, S. ^{[1
]}

Terai, M. ^{[1
]}

Lee, T. H. ^{[1
]}

Bae, J. H. ^{[1
]}

Moon, K. J. ^{[1
]}

Sung, C. ^{[1
]}

Hong, M. ^{[1
]}

Cho, D. G. ^{[1
]}

Lee, K. ^{[1
]}

Park, S. W. ^{[1
]}

Park, K. ^{[1
]}

Kuh, B. J. ^{[1
]}

Hyun, S. ^{[1
]}

Ahn, S. J. ^{[1
]}

Song, J. H. ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Semicond R&D Ctr, Suwon, Gyeonggi Do, South Korea

来源：

2024 IEEE INTERNATIONAL MEMORY WORKSHOP, IMW | 2024年

关键词：

DRAM; innovative cell structure; VCT; VS-CAT; 2T0C; IGZO; gate stack; contact resistance; thermal stability;

D O I：

10.1109/IMW59701.2024.10536968

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In order to sustain DRAM scaling trajectory below 10nm node, it is indispensable to adopt innovative cell structures, advanced processes and novel materials such as IGZO. In this paper, we will discuss promising candidates for IGZO-based DRAM cell architecture including vertical channel transistor (VCT), vertically stacked cell array transistor (VS-CAT) and capacitor-less two transistors (2T0C), and recent advances in key technologies including IGZO deposition, gate stack engineering, contact resistance, and so on.

引用

页数：4

共 11 条

[1] Capacitor-less, Long-Retention (>400s) DRAM Cell Paving the Way towards Low-Power and High-Density Monolithic 3D DRAM
Belmonte, A.
Oh, H.
Rassoul, N.
Donadio, G. L.
Mitard, J.
Dekkers, H.
Delhougne, R.
Subhechha, S.
Chasin, A.
van Setten, M. J.
Kljucar, L.
Mao, M.
Puliyalil, H.
Pak, M.
Teugels, L.
Tsvetanova, D.
Banerjee, K.
Souriau, L.
Tokei, Z.
Goux, L.
Kar, G. S.
[J]. 2020 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2020,
[2] Cho Y., 2018, IEEE Elec. Dev. Lett., P1860
[3] Dual X., IEEE Trans. Electron Dev., P2196
[4] Ha D., 2022, VLSI S, P417
[5] Ha D., 2023, IEDM
[6] Ide K., 2019, physica status solidi (a)
[7] Kim K., 2021, IEDM
[8] Kim W., 2023, VLSI S, pT17
[9] Morishita F, 1995, 1995 SYMPOSIUM ON VLSI TECHNOLOGY, P141, DOI 10.1109/VLSIT.1995.520897
[10] Wei A., 1996, IEEE Elec. Dev. Lett., P193

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